From f5fa70864c66da0f12f3d34f6451c74e3bfb3103 Mon Sep 17 00:00:00 2001 From: mickeyl Date: Fri, 24 Jan 2003 21:13:38 +0000 Subject: added syntax highlighting patterns to tinykate --- (limited to 'share/tinykate/syntax/verilog.xml') diff --git a/share/tinykate/syntax/verilog.xml b/share/tinykate/syntax/verilog.xml new file mode 100644 index 0000000..7484227 --- a/dev/null +++ b/share/tinykate/syntax/verilog.xml @@ -0,0 +1,229 @@ + + + + + + + + module + macromodule + endmodule + task + endtask + function + endfunction + table + endtable + specify + specparam + endspecify + case + casex + casez + endcase + fork + join + + defparam + default + begin + end + if + ifnone + else + forever + while + for + wait + repeat + disable + + assign + deassign + force + release + + always + initial + edge + posedge + negedge + + + + + strong0 + strong1 + pull0 + pull1 + weak0 + weak1 + highz0 + highz1 + + small + medium + large + + + + pullup + pulldown + cmos + rcmos + nmos + pmos + rnmos + rpmos + and + nand + or + nor + xor + xnor + not + buf + tran + rtran + tranif0 + tranif1 + rtranif0 + rtranif1 + bufif0 + bufif1 + notif0 + notif1 + + + + + input + output + inout + + wire + tri + tri0 + tri1 + wand + wor + triand + trior + supply0 + supply1 + + reg + integer + real + realtime + time + + vectored + scalared + trireg + + parameter + event + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + -- cgit v0.9.0.2